Typical electronic broadcast buses comprise a collection of signal lines that interconnect nodes. A node can be a processor, a memory controller, a server blade of a blade system, a core in a multi-core processing unit, a circuit board, an external network connection. The broadcast bus allows a node to broadcast messages such as instructions, addresses, and data to nodes of a computational system. Any node in electronic communication with the bus can receive messages sent from the other nodes. However, the performance and scalability of electronic broadcast buses is limited by issues of bandwidth, latency, and power consumption. As more nodes are added to the system, there is more potential for activity affecting bandwidth and a need for longer interconnects, which increases latency. Both bandwidth and latency are satisfied with more resources, which results in increases in power. In particular, electronic broadcast buses tend to be relatively large and consume a relatively large amount of power, and scaling in some cases is detrimental to performance.
Accordingly, scalable broadcast buses exhibiting low-latency and high-bandwidth are desired.